Software APIs
dt_spi_device.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_SPI_DEVICE_H_
8#define OPENTITAN_DT_SPI_DEVICE_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP spi_device and top darjeeling.
17 *
18 * This file contains the type definitions and global functions of the spi_device.
19 */
20
21#include "hw/top/dt/dt_api.h"
22#include <stdint.h>
23
24
25
26/**
27 * List of instances.
28 */
29typedef enum dt_spi_device {
30 kDtSpiDevice = 0, /**< spi_device */
31 kDtSpiDeviceFirst = 0, /**< \internal First instance */
32 kDtSpiDeviceCount = 1, /**< \internal Number of instances */
34
35/**
36 * List of register blocks.
37 *
38 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
39 */
41 kDtSpiDeviceRegBlockCore = 0, /**< */
42 kDtSpiDeviceRegBlockCount = 1, /**< \internal Number of register blocks */
44
45/** Primary register block (associated with the "primary" set of registers that control the IP). */
46static const dt_spi_device_reg_block_t kDtSpiDeviceRegBlockPrimary = kDtSpiDeviceRegBlockCore;
47
48/**
49 * List of memories.
50 *
51 * Memories are guaranteed to start at 0 and to be consecutively numbered.
52 */
54 kDtSpiDeviceMemoryCount = 0, /**< \internal Number of memories */
56
57/**
58 * List of IRQs.
59 *
60 * IRQs are guaranteed to be numbered consecutively from 0.
61 */
62typedef enum dt_spi_device_irq {
63 kDtSpiDeviceIrqUploadCmdfifoNotEmpty = 0, /**< Upload Command FIFO is not empty */
64 kDtSpiDeviceIrqUploadPayloadNotEmpty = 1, /**< Upload payload is not empty.
65
66The event occurs after SPI transaction completed */
67 kDtSpiDeviceIrqUploadPayloadOverflow = 2, /**< Upload payload overflow event.
68
69When a SPI Host system issues a command with payload more than 256B,
70this event is reported. When it happens, SW should read the last
71written payload index CSR to figure out the starting address of the
72last 256B. */
73 kDtSpiDeviceIrqReadbufWatermark = 3, /**< Read Buffer Threshold event.
74
75The host system accesses greater than or equal to the threshold of a
76buffer. */
77 kDtSpiDeviceIrqReadbufFlip = 4, /**< Read buffer flipped event.
78
79The host system accesses other side of buffer. */
80 kDtSpiDeviceIrqTpmHeaderNotEmpty = 5, /**< TPM Header(Command/Address) buffer available */
81 kDtSpiDeviceIrqTpmRdfifoCmdEnd = 6, /**< TPM RdFIFO command ended.
82
83The TPM Read command targeting the RdFIFO ended.
84Check TPM_STATUS.rdfifo_aborted to see if the transaction completed. */
85 kDtSpiDeviceIrqTpmRdfifoDrop = 7, /**< TPM RdFIFO data dropped.
86
87Data was dropped from the RdFIFO.
88Data was written while a read command was not active, and it was not accepted.
89This can occur when the host aborts a read command. */
90 kDtSpiDeviceIrqCount = 8, /**< \internal Number of IRQs */
92
93/**
94 * List of Alerts.
95 *
96 * Alerts are guaranteed to be numbered consecutively from 0.
97 */
98typedef enum dt_spi_device_alert {
99 kDtSpiDeviceAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
100 kDtSpiDeviceAlertCount = 1, /**< \internal Number of Alerts */
102
103/**
104 * List of clock ports.
105 *
106 * Clock ports are guaranteed to be numbered consecutively from 0.
107 */
109 kDtSpiDeviceClockClk = 0, /**< Clock port clk_i */
110 kDtSpiDeviceClockCount = 1, /**< \internal Number of clock ports */
112
113/**
114 * List of reset ports.
115 *
116 * Reset ports are guaranteed to be numbered consecutively from 0.
117 */
119 kDtSpiDeviceResetRst = 0, /**< Reset port rst_ni */
120 kDtSpiDeviceResetCount = 1, /**< \internal Number of reset ports */
122
123/**
124 * List of peripheral I/O.
125 *
126 * Peripheral I/O are guaranteed to be numbered consecutively from 0.
127 */
129 kDtSpiDevicePeriphIoSck = 0, /**< */
130 kDtSpiDevicePeriphIoCsb = 1, /**< */
131 kDtSpiDevicePeriphIoTpmCsb = 2, /**< */
132 kDtSpiDevicePeriphIoSd0 = 3, /**< */
133 kDtSpiDevicePeriphIoSd1 = 4, /**< */
134 kDtSpiDevicePeriphIoSd2 = 5, /**< */
135 kDtSpiDevicePeriphIoSd3 = 6, /**< */
136 kDtSpiDevicePeriphIoCount = 7, /**< \internal Number of peripheral I/O */
138
139/**
140 * List of supported hardware features.
141 */
142#define OPENTITAN_SPI_DEVICE_HAS_MODE_FLASH_EMULATION 1
143#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH 1
144#define OPENTITAN_SPI_DEVICE_HAS_MODE_TPM 1
145#define OPENTITAN_SPI_DEVICE_HAS_HW_LANES 1
146#define OPENTITAN_SPI_DEVICE_HAS_HW_SERDES_ORDERING 1
147#define OPENTITAN_SPI_DEVICE_HAS_HW_CSB_STATUS 1
148#define OPENTITAN_SPI_DEVICE_HAS_MODE_FLASH_EMULATION_COMMANDS 1
149#define OPENTITAN_SPI_DEVICE_HAS_HW_FLASH_EMULATION_BLOCKS 1
150#define OPENTITAN_SPI_DEVICE_HAS_MODE_FLASH_EMULATION_READ_COMMAND_PROCESSOR 1
151#define OPENTITAN_SPI_DEVICE_HAS_MODE_FLASH_EMULATION_DUMMY_CYCLE 1
152#define OPENTITAN_SPI_DEVICE_HAS_MODE_FLASH_EMULATION_WRITE_ENABLE_DISABLE 1
153#define OPENTITAN_SPI_DEVICE_HAS_HW_LAST_READ_ADDR 1
154#define OPENTITAN_SPI_DEVICE_HAS_HW_CMDINFOS 1
155#define OPENTITAN_SPI_DEVICE_HAS_HW_COMMAND_UPLOAD 1
156#define OPENTITAN_SPI_DEVICE_HAS_HW_3B4B_ADDRESSING 1
157#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_CMD_FILTER 1
158#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_ADDRESS_MANIPULATION 1
159#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_STATUS_MANIPULATION 1
160#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_OUTPUT_ENABLE_CONTROL 1
161#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_INTERCEPT_EN 1
162#define OPENTITAN_SPI_DEVICE_HAS_MODE_PASSTHROUGH_MAILBOX 1
163#define OPENTITAN_SPI_DEVICE_HAS_MODE_TPM_RETURN_BY_HW_REGS 1
164#define OPENTITAN_SPI_DEVICE_HAS_MODE_TPM_AUTO_WAIT 1
165#define OPENTITAN_SPI_DEVICE_HAS_MODE_TPM_READ_FIFO_MODE 1
166#define OPENTITAN_SPI_DEVICE_HAS_MODE_TPM_CAPABILITY 1
167
168
169
170/**
171 * Get the spi_device instance from an instance ID
172 *
173 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
174 *
175 * @param inst_id Instance ID.
176 * @return A spi_device instance.
177 *
178 * **Note:** This function only makes sense if the instance ID has device type spi_device,
179 * otherwise the returned value is unspecified.
180 */
182
183/**
184 * Get the instance ID of an instance.
185 *
186 * @param dt Instance of spi_device.
187 * @return The instance ID of that instance.
188 */
190
191/**
192 * Get the register base address of an instance.
193 *
194 * @param dt Instance of spi_device.
195 * @param reg_block The register block requested.
196 * @return The register base address of the requested block.
197 */
200 dt_spi_device_reg_block_t reg_block);
201
202/**
203 * Get the primary register base address of an instance.
204 *
205 * This is just a convenience function, equivalent to
206 * `dt_spi_device_reg_block(dt, kDtSpiDeviceRegBlockCore)`
207 *
208 * @param dt Instance of spi_device.
209 * @return The register base address of the primary register block.
210 */
211static inline uint32_t dt_spi_device_primary_reg_block(
212 dt_spi_device_t dt) {
213 return dt_spi_device_reg_block(dt, kDtSpiDeviceRegBlockCore);
214}
215
216/**
217 * Get the base address of a memory.
218 *
219 * @param dt Instance of spi_device.
220 * @param mem The memory requested.
221 * @return The base address of the requested memory.
222 */
226
227/**
228 * Get the size of a memory.
229 *
230 * @param dt Instance of spi_device.
231 * @param mem The memory requested.
232 * @return The size of the requested memory.
233 */
237
238/**
239 * Get the PLIC ID of a spi_device IRQ for a given instance.
240 *
241 * If the instance is not connected to the PLIC, this function
242 * will return `kDtPlicIrqIdNone`.
243 *
244 * @param dt Instance of spi_device.
245 * @param irq A spi_device IRQ.
246 * @return The PLIC ID of the IRQ of this instance.
247 */
251
252/**
253 * Convert a global IRQ ID to a local spi_device IRQ type.
254 *
255 * @param dt Instance of spi_device.
256 * @param irq A PLIC ID that belongs to this instance.
257 * @return The spi_device IRQ, or `kDtSpiDeviceIrqCount`.
258 *
259 * **Note:** This function assumes that the PLIC ID belongs to the instance
260 * of spi_device passed in parameter. In other words, it must be the case that
261 * `dt_spi_device_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
262 * will return `kDtSpiDeviceIrqCount`.
263 */
266 dt_plic_irq_id_t irq);
267
268
269/**
270 * Get the alert ID of a spi_device alert for a given instance.
271 *
272 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
273 * instances where the instance is not connected, the return value is unspecified.
274 *
275 * @param dt Instance of spi_device.
276 * @param alert A spi_device alert.
277 * @return The Alert Handler alert ID of the alert of this instance.
278 */
282
283/**
284 * Convert a global alert ID to a local spi_device alert type.
285 *
286 * @param dt Instance of spi_device.
287 * @param alert A global alert ID that belongs to this instance.
288 * @return The spi_device alert, or `kDtSpiDeviceAlertCount`.
289 *
290 * **Note:** This function assumes that the global alert ID belongs to the
291 * instance of spi_device passed in parameter. In other words, it must be the case
292 * that `dt_spi_device_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
293 * this function will return `kDtSpiDeviceAlertCount`.
294 */
297 dt_alert_id_t alert);
298
299
300/**
301 * Get the peripheral I/O description of an instance.
302 *
303 * @param dt Instance of spi_device.
304 * @param sig Requested peripheral I/O.
305 * @return Description of the requested peripheral I/O for this instance.
306 */
310
311/**
312 * Get the clock signal connected to a clock port of an instance.
313 *
314 * @param dt Instance of spi_device.
315 * @param clk Clock port.
316 * @return Clock signal.
317 */
321
322/**
323 * Get the reset signal connected to a reset port of an instance.
324 *
325 * @param dt Instance of spi_device.
326 * @param rst Reset port.
327 * @return Reset signal.
328 */
332
333
334
335#ifdef __cplusplus
336} // extern "C"
337#endif // __cplusplus
338
339#endif // OPENTITAN_DT_SPI_DEVICE_H_