Software APIs
dt_rstmgr.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_RSTMGR_H_
8#define OPENTITAN_DT_RSTMGR_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP rstmgr and top darjeeling.
17 *
18 * This file contains the type definitions and global functions of the rstmgr.
19 */
20
21#include "hw/top/dt/dt_api.h"
22#include <stdint.h>
23
24
25
26
27
28/**
29 * List of instances.
30 */
31typedef enum dt_rstmgr {
32 kDtRstmgrAon = 0, /**< rstmgr_aon */
33 kDtRstmgrFirst = 0, /**< \internal First instance */
34 kDtRstmgrCount = 1, /**< \internal Number of instances */
36
37/**
38 * List of register blocks.
39 *
40 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
41 */
42typedef enum dt_rstmgr_reg_block {
43 kDtRstmgrRegBlockCore = 0, /**< */
44 kDtRstmgrRegBlockCount = 1, /**< \internal Number of register blocks */
46
47/**
48 * List of memories.
49 *
50 * Memories are guaranteed to start at 0 and to be consecutively numbered.
51 */
52typedef enum dt_rstmgr_memory {
53 kDtRstmgrMemoryCount = 0, /**< \internal Number of memories */
55
56/** Primary register block (associated with the "primary" set of registers that control the IP). */
57static const dt_rstmgr_reg_block_t kDtRstmgrRegBlockPrimary = kDtRstmgrRegBlockCore;
58
59/**
60 * List of Alerts.
61 *
62 * Alerts are guaranteed to be numbered consecutively from 0.
63 */
64typedef enum dt_rstmgr_alert {
65 kDtRstmgrAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal structural fault is detected.
66Structural faults include errors such as sparse fsm errors and tlul integrity errors. */
67 kDtRstmgrAlertFatalCnstyFault = 1, /**< This fatal alert is triggered when a reset consistency fault is detected.
68It is separated from the category above for clearer error collection and debug. */
69 kDtRstmgrAlertCount = 2, /**< \internal Number of Alerts */
71
72/**
73 * List of clock ports.
74 *
75 * Clock ports are guaranteed to be numbered consecutively from 0.
76 */
77typedef enum dt_rstmgr_clock {
78 kDtRstmgrClockClk = 0, /**< Clock port clk_i */
79 kDtRstmgrClockAon = 1, /**< Clock port clk_aon_i */
80 kDtRstmgrClockIoDiv4 = 2, /**< Clock port clk_io_div4_i */
81 kDtRstmgrClockMain = 3, /**< Clock port clk_main_i */
82 kDtRstmgrClockIo = 4, /**< Clock port clk_io_i */
83 kDtRstmgrClockIoDiv2 = 5, /**< Clock port clk_io_div2_i */
84 kDtRstmgrClockPor = 6, /**< Clock port clk_por_i */
85 kDtRstmgrClockCount = 7, /**< \internal Number of clock ports */
87
88/**
89 * List of reset ports.
90 *
91 * Reset ports are guaranteed to be numbered consecutively from 0.
92 */
93typedef enum dt_rstmgr_reset {
94 kDtRstmgrResetRst = 0, /**< Reset port rst_ni */
95 kDtRstmgrResetPor = 1, /**< Reset port rst_por_ni */
96 kDtRstmgrResetCount = 2, /**< \internal Number of reset ports */
98
99/**
100 * List of supported hardware features.
101 */
102#define OPENTITAN_RSTMGR_HAS_SW_RST_CHIP_RESET 1
103#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_DEVICE_REQUEST 1
104#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_DEVICE_ENABLE 1
105#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_HOST0_REQUEST 1
106#define OPENTITAN_RSTMGR_HAS_SW_RST_SPI_HOST0_ENABLE 1
107#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C0_REQUEST 1
108#define OPENTITAN_RSTMGR_HAS_SW_RST_I2C0_ENABLE 1
109#define OPENTITAN_RSTMGR_HAS_RESET_INFO_CAPTURE 1
110#define OPENTITAN_RSTMGR_HAS_RESET_INFO_CLEAR 1
111#define OPENTITAN_RSTMGR_HAS_ALERT_INFO_CAPTURE 1
112#define OPENTITAN_RSTMGR_HAS_ALERT_INFO_ENABLE 1
113#define OPENTITAN_RSTMGR_HAS_CPU_INFO_CAPTURE 1
114#define OPENTITAN_RSTMGR_HAS_CPU_INFO_ENABLE 1
115#define OPENTITAN_RSTMGR_HAS_ALERT_HANDLER_RESET_STATUS 1
116
117
118
119/**
120 * Get the rstmgr instance from an instance ID
121 *
122 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
123 *
124 * @param inst_id Instance ID.
125 * @return A rstmgr instance.
126 *
127 * **Note:** This function only makes sense if the instance ID has device type rstmgr,
128 * otherwise the returned value is unspecified.
129 */
131
132/**
133 * Get the instance ID of an instance.
134 *
135 * @param dt Instance of rstmgr.
136 * @return The instance ID of that instance.
137 */
139
140/**
141 * Get the register base address of an instance.
142 *
143 * @param dt Instance of rstmgr.
144 * @param reg_block The register block requested.
145 * @return The register base address of the requested block.
146 */
147uint32_t dt_rstmgr_reg_block(
148 dt_rstmgr_t dt,
149 dt_rstmgr_reg_block_t reg_block);
150
151/**
152 * Get the primary register base address of an instance.
153 *
154 * This is just a convenience function, equivalent to
155 * `dt_rstmgr_reg_block(dt, kDtRstmgrRegBlockCore)`
156 *
157 * @param dt Instance of rstmgr.
158 * @return The register base address of the primary register block.
159 */
160static inline uint32_t dt_rstmgr_primary_reg_block(
161 dt_rstmgr_t dt) {
162 return dt_rstmgr_reg_block(dt, kDtRstmgrRegBlockCore);
163}
164
165/**
166 * Get the base address of a memory.
167 *
168 * @param dt Instance of rstmgr.
169 * @param mem The memory requested.
170 * @return The base address of the requested memory.
171 */
172uint32_t dt_rstmgr_memory_base(
173 dt_rstmgr_t dt,
175
176/**
177 * Get the size of a memory.
178 *
179 * @param dt Instance of rstmgr.
180 * @param mem The memory requested.
181 * @return The size of the requested memory.
182 */
183uint32_t dt_rstmgr_memory_size(
184 dt_rstmgr_t dt,
186
187
188/**
189 * Get the alert ID of a rstmgr alert for a given instance.
190 *
191 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
192 * instances where the instance is not connected, the return value is unspecified.
193 *
194 * @param dt Instance of rstmgr.
195 * @param alert A rstmgr alert.
196 * @return The Alert Handler alert ID of the alert of this instance.
197 */
199 dt_rstmgr_t dt,
200 dt_rstmgr_alert_t alert);
201
202/**
203 * Convert a global alert ID to a local rstmgr alert type.
204 *
205 * @param dt Instance of rstmgr.
206 * @param alert A global alert ID that belongs to this instance.
207 * @return The rstmgr alert, or `kDtRstmgrAlertCount`.
208 *
209 * **Note:** This function assumes that the global alert ID belongs to the
210 * instance of rstmgr passed in parameter. In other words, it must be the case
211 * that `dt_rstmgr_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
212 * this function will return `kDtRstmgrAlertCount`.
213 */
215 dt_rstmgr_t dt,
216 dt_alert_id_t alert);
217
218
219
220/**
221 * Get the clock signal connected to a clock port of an instance.
222 *
223 * @param dt Instance of rstmgr.
224 * @param clk Clock port.
225 * @return Clock signal.
226 */
228 dt_rstmgr_t dt,
230
231/**
232 * Get the reset signal connected to a reset port of an instance.
233 *
234 * @param dt Instance of rstmgr.
235 * @param rst Reset port.
236 * @return Reset signal.
237 */
239 dt_rstmgr_t dt,
241
242
243
244/**
245 * Get the number of software resets.
246 *
247 * @param dt Instance of rstmgr.
248 * @return Number of software resets.
249 */
251
252/**
253 * Get the reset ID of a software reset.
254 *
255 * The resets are ordered in the same way as they appear in the registers.
256 *
257 * @param dt Instance of rstmgr.
258 * @param idx Index of the software reset, between 0 and `dt_rstmgr_sw_reset_count(dt)-1`.
259 * @return Reset ID, or `kDtResetUnknown` for invalid parameters.
260 */
262
263/**
264 * Description of a reset request source.
265 *
266 * A reset request source is always identified by the instance ID of the module where it comes
267 * from. In principle, some instances could have several reset requests. If this is the case,
268 * the `rst_req` can be used to distinguish between those. It should be cast to the
269 * `dt_<ip>_reset_req_t` type of the corresponding IP.
270 *
271 * WARNING At the moment, three hardcoded reset requests are treated specially and have their
272 * `reset_req` field set to `0` because there is no corresponding reset request declared by those
273 * IPs:
274 * - the main power glitch reset request, coming from the `pwrmgr`,
275 * - the escalation reset request, coming from the `alert_handler`,
276 * - the non-debug-module reset request, coming from the `rv_dm`.
277 */
278typedef struct dt_rstmgr_reset_req_src {
279 dt_instance_id_t inst_id; /**< Instance ID of the source of this reset request. */
280 size_t reset_req; /**< Index of the reset request signal for that instance. */
282
283
284/**
285 * Get the number of hardware reset requests.
286 *
287 * @param dt Instance of rstmgr.
288 * @return Number of reset requests.
289 */
291
292/**
293 * Get the description of a reset request.
294 *
295 * The reset requests are ordered as they appear in the registers.
296 *
297 * @param dt Instance of rstmgr.
298 * @param idx Index of the reset request source, between 0 and
299 * `dt_pwrmgr_hw_reset_req_src_count(dt)-1`.
300 * @return Description of the reset.
301 */
303
304
305
306#ifdef __cplusplus
307} // extern "C"
308#endif // __cplusplus
309
310#endif // OPENTITAN_DT_RSTMGR_H_