Software APIs
dt_rom_ctrl.h
Go to the documentation of this file.
1
// Copyright lowRISC contributors (OpenTitan project).
2
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3
// SPDX-License-Identifier: Apache-2.0
4
//
5
// Device table API auto-generated by `dtgen`
6
7
#ifndef OPENTITAN_DT_ROM_CTRL_H_
8
#define OPENTITAN_DT_ROM_CTRL_H_
9
10
#ifdef __cplusplus
11
extern
"C"
{
12
#endif
// __cplusplus
13
14
/**
15
* @file
16
* @brief Device Tables (DT) for IP rom_ctrl and top darjeeling.
17
*
18
* This file contains the type definitions and global functions of the rom_ctrl.
19
*/
20
21
#include "
dt_api.h
"
22
#include <stdint.h>
23
24
25
26
/**
27
* List of instances.
28
*/
29
typedef
enum
dt_rom_ctrl
{
30
kDtRomCtrl0
= 0,
/**< rom_ctrl0 */
31
kDtRomCtrl1
= 1,
/**< rom_ctrl1 */
32
kDtRomCtrlFirst = 0,
/**< \internal First instance */
33
kDtRomCtrlCount = 2,
/**< \internal Number of instances */
34
}
dt_rom_ctrl_t
;
35
36
/**
37
* List of register blocks.
38
*
39
* Register blocks are guaranteed to start at 0 and to be consecutively numbered.
40
*/
41
typedef
enum
dt_rom_ctrl_reg_block
{
42
kDtRomCtrlRegBlockRegs = 0,
/**< */
43
kDtRomCtrlRegBlockRom = 1,
/**< */
44
kDtRomCtrlRegBlockCount = 2,
/**< \internal Number of register blocks */
45
}
dt_rom_ctrl_reg_block_t
;
46
47
/** Primary register block (associated with the "primary" set of registers that control the IP). */
48
static
const
dt_rom_ctrl_reg_block_t
kDtRomCtrlRegBlockPrimary = kDtRomCtrlRegBlockRegs;
49
50
/**
51
* List of Alerts.
52
*
53
* Alerts are guaranteed to be numbered consecutively from 0.
54
*/
55
typedef
enum
dt_rom_ctrl_alert
{
56
kDtRomCtrlAlertFatal
= 0,
/**< A fatal error. Fatal alerts are non-recoverable and will be asserted until a hard reset. */
57
kDtRomCtrlAlertCount = 1,
/**< \internal Number of Alerts */
58
}
dt_rom_ctrl_alert_t
;
59
60
/**
61
* List of clock ports.
62
*
63
* Clock ports are guaranteed to be numbered consecutively from 0.
64
*/
65
typedef
enum
dt_rom_ctrl_clock
{
66
kDtRomCtrlClockClk
= 0,
/**< Clock port clk_i */
67
kDtRomCtrlClockCount = 1,
/**< \internal Number of clock ports */
68
}
dt_rom_ctrl_clock_t
;
69
70
/**
71
* List of reset ports.
72
*
73
* Reset ports are guaranteed to be numbered consecutively from 0.
74
*/
75
typedef
enum
dt_rom_ctrl_reset
{
76
kDtRomCtrlResetRst
= 0,
/**< Reset port rst_ni */
77
kDtRomCtrlResetCount = 1,
/**< \internal Number of reset ports */
78
}
dt_rom_ctrl_reset_t
;
79
80
/**
81
* List of supported hardware features.
82
*/
83
#define OPENTITAN_ROM_CTRL_HAS_SCRAMBLED 1
84
#define OPENTITAN_ROM_CTRL_HAS_DIGESTS 1
85
#define OPENTITAN_ROM_CTRL_HAS_EXP_DIGESTS 1
86
87
88
89
/**
90
* Get the rom_ctrl instance from an instance ID
91
*
92
* For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
93
*
94
* @param inst_id Instance ID.
95
* @return A rom_ctrl instance.
96
*
97
* **Note:** This function only makes sense if the instance ID has device type rom_ctrl,
98
* otherwise the returned value is unspecified.
99
*/
100
dt_rom_ctrl_t
dt_rom_ctrl_from_instance_id
(
dt_instance_id_t
inst_id);
101
102
/**
103
* Get the instance ID of an instance.
104
*
105
* @param dt Instance of rom_ctrl.
106
* @return The instance ID of that instance.
107
*/
108
dt_instance_id_t
dt_rom_ctrl_instance_id
(
dt_rom_ctrl_t
dt);
109
110
/**
111
* Get the register base address of an instance.
112
*
113
* @param dt Instance of rom_ctrl.
114
* @param reg_block The register block requested.
115
* @return The register base address of the requested block.
116
*/
117
uint32_t
dt_rom_ctrl_reg_block
(
118
dt_rom_ctrl_t
dt,
119
dt_rom_ctrl_reg_block_t
reg_block);
120
121
/**
122
* Get the primary register base address of an instance.
123
*
124
* This is just a convenience function, equivalent to
125
* `dt_rom_ctrl_reg_block(dt, kDtRomCtrlRegBlockRegs)`
126
*
127
* @param dt Instance of rom_ctrl.
128
* @return The register base address of the primary register block.
129
*/
130
static
inline
uint32_t dt_rom_ctrl_primary_reg_block(
131
dt_rom_ctrl_t
dt) {
132
return
dt_rom_ctrl_reg_block
(dt, kDtRomCtrlRegBlockRegs);
133
}
134
135
136
/**
137
* Get the alert ID of a rom_ctrl alert for a given instance.
138
*
139
* **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
140
* instances where the instance is not connected, the return value is unspecified.
141
*
142
* @param dt Instance of rom_ctrl.
143
* @param alert A rom_ctrl alert.
144
* @return The Alert Handler alert ID of the alert of this instance.
145
*/
146
dt_alert_id_t
dt_rom_ctrl_alert_to_alert_id
(
147
dt_rom_ctrl_t
dt,
148
dt_rom_ctrl_alert_t
alert);
149
150
/**
151
* Convert a global alert ID to a local rom_ctrl alert type.
152
*
153
* @param dt Instance of rom_ctrl.
154
* @param alert A global alert ID that belongs to this instance.
155
* @return The rom_ctrl alert, or `kDtRomCtrlAlertCount`.
156
*
157
* **Note:** This function assumes that the global alert ID belongs to the
158
* instance of rom_ctrl passed in parameter. In other words, it must be the case
159
* that `dt_rom_ctrl_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
160
* this function will return `kDtRomCtrlAlertCount`.
161
*/
162
dt_rom_ctrl_alert_t
dt_rom_ctrl_alert_from_alert_id
(
163
dt_rom_ctrl_t
dt,
164
dt_alert_id_t
alert);
165
166
167
168
/**
169
* Get the clock signal connected to a clock port of an instance.
170
*
171
* @param dt Instance of rom_ctrl.
172
* @param clk Clock port.
173
* @return Clock signal.
174
*/
175
dt_clock_t
dt_rom_ctrl_clock
(
176
dt_rom_ctrl_t
dt,
177
dt_rom_ctrl_clock_t
clk);
178
179
/**
180
* Get the reset signal connected to a reset port of an instance.
181
*
182
* @param dt Instance of rom_ctrl.
183
* @param rst Reset port.
184
* @return Reset signal.
185
*/
186
dt_reset_t
dt_rom_ctrl_reset
(
187
dt_rom_ctrl_t
dt,
188
dt_rom_ctrl_reset_t
rst);
189
190
191
192
#ifdef __cplusplus
193
}
// extern "C"
194
#endif
// __cplusplus
195
196
#endif
// OPENTITAN_DT_ROM_CTRL_H_
(darjeeling)
hw
top
dt
dt_rom_ctrl.h
Return to
OpenTitan Documentation