Software APIs
dt_pwrmgr.h
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// Copyright lowRISC contributors (OpenTitan project).
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Device table API auto-generated by `dtgen`
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#ifndef OPENTITAN_DT_PWRMGR_H_
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#define OPENTITAN_DT_PWRMGR_H_
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#ifdef __cplusplus
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extern
"C"
{
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#endif
// __cplusplus
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/**
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* @file
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* @brief Device Tables (DT) for IP pwrmgr and top darjeeling.
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*
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* This file contains the type definitions and global functions of the pwrmgr.
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*/
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#include "hw/top/dt/dt_api.h"
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#include <stdint.h>
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/**
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* List of instances.
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*/
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typedef
enum
dt_pwrmgr
{
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kDtPwrmgrAon
= 0,
/**< pwrmgr_aon */
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kDtPwrmgrFirst = 0,
/**< \internal First instance */
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kDtPwrmgrCount = 1,
/**< \internal Number of instances */
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}
dt_pwrmgr_t
;
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/**
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* List of register blocks.
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*
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* Register blocks are guaranteed to start at 0 and to be consecutively numbered.
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*/
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typedef
enum
dt_pwrmgr_reg_block
{
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kDtPwrmgrRegBlockCore = 0,
/**< */
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kDtPwrmgrRegBlockCount = 1,
/**< \internal Number of register blocks */
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}
dt_pwrmgr_reg_block_t
;
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/**
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* List of memories.
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*
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* Memories are guaranteed to start at 0 and to be consecutively numbered.
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*/
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typedef
enum
dt_pwrmgr_memory
{
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kDtPwrmgrMemoryCount = 0,
/**< \internal Number of memories */
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}
dt_pwrmgr_memory_t
;
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/** Primary register block (associated with the "primary" set of registers that control the IP). */
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static
const
dt_pwrmgr_reg_block_t
kDtPwrmgrRegBlockPrimary = kDtPwrmgrRegBlockCore;
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/**
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* List of IRQs.
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*
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* IRQs are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_pwrmgr_irq
{
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kDtPwrmgrIrqWakeup
= 0,
/**< Wake from low power state. See wake info for more details */
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kDtPwrmgrIrqCount = 1,
/**< \internal Number of IRQs */
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}
dt_pwrmgr_irq_t
;
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/**
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* List of Alerts.
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*
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* Alerts are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_pwrmgr_alert
{
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kDtPwrmgrAlertFatalFault
= 0,
/**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
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kDtPwrmgrAlertCount = 1,
/**< \internal Number of Alerts */
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}
dt_pwrmgr_alert_t
;
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/**
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* List of clock ports.
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*
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* Clock ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_pwrmgr_clock
{
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kDtPwrmgrClockClk
= 0,
/**< Clock port clk_i */
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kDtPwrmgrClockSlow
= 1,
/**< Clock port clk_slow_i */
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kDtPwrmgrClockLc
= 2,
/**< Clock port clk_lc_i */
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kDtPwrmgrClockEsc
= 3,
/**< Clock port clk_esc_i */
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kDtPwrmgrClockCount = 4,
/**< \internal Number of clock ports */
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}
dt_pwrmgr_clock_t
;
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/**
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* List of reset ports.
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*
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* Reset ports are guaranteed to be numbered consecutively from 0.
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*/
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typedef
enum
dt_pwrmgr_reset
{
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kDtPwrmgrResetRst
= 0,
/**< Reset port rst_ni */
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kDtPwrmgrResetMain
= 1,
/**< Reset port rst_main_ni */
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kDtPwrmgrResetSlow
= 2,
/**< Reset port rst_slow_ni */
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kDtPwrmgrResetLc
= 3,
/**< Reset port rst_lc_ni */
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kDtPwrmgrResetEsc
= 4,
/**< Reset port rst_esc_ni */
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kDtPwrmgrResetCount = 5,
/**< \internal Number of reset ports */
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}
dt_pwrmgr_reset_t
;
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/**
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* List of supported hardware features.
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*/
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#define OPENTITAN_PWRMGR_HAS_STARTUP_LIFE_CYCLE_INITIALIZATION 1
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#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_IO_IN_LOW_POWER 1
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#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_MAIN_IN_LOW_POWER 1
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#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_USB_IN_LOW_POWER 1
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#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_USB_WHEN_ACTIVE 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_ENTRY 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_DISABLE_POWER 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_PIN_WKUP_REQ_WAKEUP_ENABLE 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_PIN_WKUP_REQ_WAKEUP_REQUEST 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_AON_TIMER_AON_WKUP_REQ_WAKEUP_ENABLE 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_AON_TIMER_AON_WKUP_REQ_WAKEUP_REQUEST 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_SOC_PROXY_WKUP_INTERNAL_REQ_WAKEUP_ENABLE 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_SOC_PROXY_WKUP_INTERNAL_REQ_WAKEUP_REQUEST 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_SOC_PROXY_WKUP_EXTERNAL_REQ_WAKEUP_ENABLE 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_SOC_PROXY_WKUP_EXTERNAL_REQ_WAKEUP_REQUEST 1
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#define OPENTITAN_PWRMGR_HAS_LOW_POWER_WAKE_INFO 1
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#define OPENTITAN_PWRMGR_HAS_RESET_CHECK_ROM_INTEGRITY 1
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#define OPENTITAN_PWRMGR_HAS_RESET_AON_TIMER_AON_AON_TIMER_RST_REQ_ENABLE 1
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#define OPENTITAN_PWRMGR_HAS_RESET_AON_TIMER_AON_AON_TIMER_RST_REQ_REQUEST 1
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#define OPENTITAN_PWRMGR_HAS_RESET_SOC_PROXY_RST_REQ_EXTERNAL_ENABLE 1
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#define OPENTITAN_PWRMGR_HAS_RESET_SOC_PROXY_RST_REQ_EXTERNAL_REQUEST 1
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#define OPENTITAN_PWRMGR_HAS_RESET_ESCALATION_REQUEST 1
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#define OPENTITAN_PWRMGR_HAS_RESET_ESCALATION_TIMEOUT 1
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#define OPENTITAN_PWRMGR_HAS_RESET_SW_RST_REQUEST 1
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#define OPENTITAN_PWRMGR_HAS_RESET_MAIN_POWER_GLITCH_RESET 1
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#define OPENTITAN_PWRMGR_HAS_RESET_NDM_RESET_REQUEST 1
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#define OPENTITAN_PWRMGR_HAS_RESET_POR_REQUEST 1
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/**
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* Get the pwrmgr instance from an instance ID
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*
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* For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
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*
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* @param inst_id Instance ID.
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* @return A pwrmgr instance.
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*
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* **Note:** This function only makes sense if the instance ID has device type pwrmgr,
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* otherwise the returned value is unspecified.
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*/
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dt_pwrmgr_t
dt_pwrmgr_from_instance_id
(
dt_instance_id_t
inst_id);
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/**
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* Get the instance ID of an instance.
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*
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* @param dt Instance of pwrmgr.
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* @return The instance ID of that instance.
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*/
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dt_instance_id_t
dt_pwrmgr_instance_id
(
dt_pwrmgr_t
dt);
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/**
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* Get the register base address of an instance.
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*
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* @param dt Instance of pwrmgr.
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* @param reg_block The register block requested.
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* @return The register base address of the requested block.
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*/
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uint32_t
dt_pwrmgr_reg_block
(
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dt_pwrmgr_t
dt,
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dt_pwrmgr_reg_block_t
reg_block);
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/**
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* Get the primary register base address of an instance.
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*
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* This is just a convenience function, equivalent to
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* `dt_pwrmgr_reg_block(dt, kDtPwrmgrRegBlockCore)`
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*
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* @param dt Instance of pwrmgr.
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* @return The register base address of the primary register block.
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*/
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static
inline
uint32_t dt_pwrmgr_primary_reg_block(
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dt_pwrmgr_t
dt) {
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return
dt_pwrmgr_reg_block
(dt, kDtPwrmgrRegBlockCore);
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}
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/**
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* Get the base address of a memory.
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*
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* @param dt Instance of pwrmgr.
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* @param mem The memory requested.
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* @return The base address of the requested memory.
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*/
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uint32_t
dt_pwrmgr_memory_base
(
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dt_pwrmgr_t
dt,
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dt_pwrmgr_memory_t
mem);
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/**
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* Get the size of a memory.
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*
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* @param dt Instance of pwrmgr.
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* @param mem The memory requested.
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* @return The size of the requested memory.
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*/
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uint32_t
dt_pwrmgr_memory_size
(
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dt_pwrmgr_t
dt,
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dt_pwrmgr_memory_t
mem);
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/**
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* Get the PLIC ID of a pwrmgr IRQ for a given instance.
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*
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* If the instance is not connected to the PLIC, this function
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* will return `kDtPlicIrqIdNone`.
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*
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* @param dt Instance of pwrmgr.
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* @param irq A pwrmgr IRQ.
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* @return The PLIC ID of the IRQ of this instance.
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*/
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dt_plic_irq_id_t
dt_pwrmgr_irq_to_plic_id
(
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dt_pwrmgr_t
dt,
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dt_pwrmgr_irq_t
irq);
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/**
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* Convert a global IRQ ID to a local pwrmgr IRQ type.
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*
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* @param dt Instance of pwrmgr.
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* @param irq A PLIC ID that belongs to this instance.
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* @return The pwrmgr IRQ, or `kDtPwrmgrIrqCount`.
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*
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* **Note:** This function assumes that the PLIC ID belongs to the instance
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* of pwrmgr passed in parameter. In other words, it must be the case that
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* `dt_pwrmgr_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
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* will return `kDtPwrmgrIrqCount`.
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*/
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dt_pwrmgr_irq_t
dt_pwrmgr_irq_from_plic_id
(
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dt_pwrmgr_t
dt,
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dt_plic_irq_id_t
irq);
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/**
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* Get the alert ID of a pwrmgr alert for a given instance.
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*
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* **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
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* instances where the instance is not connected, the return value is unspecified.
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*
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* @param dt Instance of pwrmgr.
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* @param alert A pwrmgr alert.
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* @return The Alert Handler alert ID of the alert of this instance.
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*/
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dt_alert_id_t
dt_pwrmgr_alert_to_alert_id
(
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dt_pwrmgr_t
dt,
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dt_pwrmgr_alert_t
alert);
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/**
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* Convert a global alert ID to a local pwrmgr alert type.
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*
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* @param dt Instance of pwrmgr.
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* @param alert A global alert ID that belongs to this instance.
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* @return The pwrmgr alert, or `kDtPwrmgrAlertCount`.
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*
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* **Note:** This function assumes that the global alert ID belongs to the
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* instance of pwrmgr passed in parameter. In other words, it must be the case
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* that `dt_pwrmgr_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
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* this function will return `kDtPwrmgrAlertCount`.
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*/
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dt_pwrmgr_alert_t
dt_pwrmgr_alert_from_alert_id
(
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dt_pwrmgr_t
dt,
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dt_alert_id_t
alert);
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/**
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* Get the clock signal connected to a clock port of an instance.
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*
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* @param dt Instance of pwrmgr.
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* @param clk Clock port.
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* @return Clock signal.
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*/
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dt_clock_t
dt_pwrmgr_clock
(
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dt_pwrmgr_t
dt,
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dt_pwrmgr_clock_t
clk);
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/**
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* Get the reset signal connected to a reset port of an instance.
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*
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* @param dt Instance of pwrmgr.
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* @param rst Reset port.
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* @return Reset signal.
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*/
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dt_reset_t
dt_pwrmgr_reset
(
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dt_pwrmgr_t
dt,
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dt_pwrmgr_reset_t
rst);
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/**
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* Description of a wakeup source.
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*
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* A wakeup source is always identified by the instance ID of the module where it comes from.
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* Some instances can have several wakeup signals, e.g. the pinmux has two (`pin` and `usb`).
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* For such IPs, it is not sufficient to know the instance, we also need to know which
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* signal triggered the wakeup. The `wakeup` index can be used to distinguish between those.
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* This value should be casted to the `dt_<ip>_wakeup_t` type of the corresponding IP.
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* For example, if the `pwrmgr` has two `pinmux` wakeup sources as described above, it's
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* two wakeup sources will be described as follows:
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* ```c
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* {.inst_id = kDtInstanceIdPinmux, .wakeup = kDtPinmuxWakeupPinWkupReq}, // for `pin`
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* {.inst_id = kDtInstanceIdPinmux, .wakeup = kDtPinmuxWakeupUsbWkupReq}, // for `usb`
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* ```
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*/
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typedef
struct
dt_pwrmgr_wakeup_src
{
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dt_instance_id_t
inst_id
;
/**< Instance ID of the source of this wakeup. */
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size_t
wakeup
;
/**< Index of the wakeup signal for that instance. */
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}
dt_pwrmgr_wakeup_src_t
;
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/**
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* Get the number of wakeup sources.
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*
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* @param dt Instance of pwrmgr.
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* @return Number of wakeup sources.
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*/
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size_t
dt_pwrmgr_wakeup_src_count
(
dt_pwrmgr_t
dt);
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/**
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* Get the description of a wakeup source.
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*
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* The wakeup sources are ordered as they appear in the registers.
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*
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* @param dt Instance of pwrmgr.
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* @param idx Index of the wakeup source, between 0 and `dt_pwrmgr_wakeup_src_count(dt)-1`.
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* @return Description of the source.
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*/
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dt_pwrmgr_wakeup_src_t
dt_pwrmgr_wakeup_src
(
dt_pwrmgr_t
dt,
size_t
idx);
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/**
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* Description of a reset request source.
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*
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* A reset request source is always identified by the instance ID of the module where it comes
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* from. In principle, some instances could have several reset requests. If this is the case,
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* the `rst_req` can be used to distinguish between those. It should be cast to the
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* `dt_<ip>_reset_req_t` type of the corresponding IP.
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*/
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typedef
struct
dt_pwrmgr_reset_req_src
{
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dt_instance_id_t
inst_id
;
/**< Instance ID of the source of this reset request. */
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size_t
reset_req
;
/**< Index of the reset request signal for that instance. */
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}
dt_pwrmgr_reset_req_src_t
;
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/**
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* Get the number of peripheral reset requests.
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*
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* @param dt Instance of pwrmgr.
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* @return Number of reset requests.
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*/
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size_t
dt_pwrmgr_reset_request_src_count
(
dt_pwrmgr_t
dt);
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/**
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* Get the description of a reset request.
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*
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* The reset requests are ordered as they appear in the registers.
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*
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* @param dt Instance of pwrmgr.
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* @param idx Index of the reset request source, between 0 and
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* `dt_pwrmgr_reset_request_src_count(dt)-1`.
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* @return Description of the reset.
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*/
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dt_pwrmgr_reset_req_src_t
dt_pwrmgr_reset_request_src
(
dt_pwrmgr_t
dt,
size_t
idx);
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#ifdef __cplusplus
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}
// extern "C"
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#endif
// __cplusplus
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#endif
// OPENTITAN_DT_PWRMGR_H_
(darjeeling)
hw
top
dt
dt_pwrmgr.h
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