Software APIs
dt_pwrmgr.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_DT_PWRMGR_H_
8#define OPENTITAN_DT_PWRMGR_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) for IP pwrmgr and top darjeeling.
17 *
18 * This file contains the type definitions and global functions of the pwrmgr.
19 */
20
21#include "hw/top/dt/dt_api.h"
22#include <stdint.h>
23
24
25
26
27
28/**
29 * List of instances.
30 */
31typedef enum dt_pwrmgr {
32 kDtPwrmgrAon = 0, /**< pwrmgr_aon */
33 kDtPwrmgrFirst = 0, /**< \internal First instance */
34 kDtPwrmgrCount = 1, /**< \internal Number of instances */
36
37/**
38 * List of register blocks.
39 *
40 * Register blocks are guaranteed to start at 0 and to be consecutively numbered.
41 */
42typedef enum dt_pwrmgr_reg_block {
43 kDtPwrmgrRegBlockCore = 0, /**< */
44 kDtPwrmgrRegBlockCount = 1, /**< \internal Number of register blocks */
46
47/** Primary register block (associated with the "primary" set of registers that control the IP). */
48static const dt_pwrmgr_reg_block_t kDtPwrmgrRegBlockPrimary = kDtPwrmgrRegBlockCore;
49
50/**
51 * List of memories.
52 *
53 * Memories are guaranteed to start at 0 and to be consecutively numbered.
54 */
55typedef enum dt_pwrmgr_memory {
56 kDtPwrmgrMemoryCount = 0, /**< \internal Number of memories */
58
59/**
60 * List of IRQs.
61 *
62 * IRQs are guaranteed to be numbered consecutively from 0.
63 */
64typedef enum dt_pwrmgr_irq {
65 kDtPwrmgrIrqWakeup = 0, /**< Wake from low power state. See wake info for more details */
66 kDtPwrmgrIrqCount = 1, /**< \internal Number of IRQs */
68
69/**
70 * List of Alerts.
71 *
72 * Alerts are guaranteed to be numbered consecutively from 0.
73 */
74typedef enum dt_pwrmgr_alert {
75 kDtPwrmgrAlertFatalFault = 0, /**< This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. */
76 kDtPwrmgrAlertCount = 1, /**< \internal Number of Alerts */
78
79/**
80 * List of clock ports.
81 *
82 * Clock ports are guaranteed to be numbered consecutively from 0.
83 */
84typedef enum dt_pwrmgr_clock {
85 kDtPwrmgrClockClk = 0, /**< Clock port clk_i */
86 kDtPwrmgrClockSlow = 1, /**< Clock port clk_slow_i */
87 kDtPwrmgrClockLc = 2, /**< Clock port clk_lc_i */
88 kDtPwrmgrClockEsc = 3, /**< Clock port clk_esc_i */
89 kDtPwrmgrClockCount = 4, /**< \internal Number of clock ports */
91
92/**
93 * List of reset ports.
94 *
95 * Reset ports are guaranteed to be numbered consecutively from 0.
96 */
97typedef enum dt_pwrmgr_reset {
98 kDtPwrmgrResetRst = 0, /**< Reset port rst_ni */
99 kDtPwrmgrResetMain = 1, /**< Reset port rst_main_ni */
100 kDtPwrmgrResetSlow = 2, /**< Reset port rst_slow_ni */
101 kDtPwrmgrResetLc = 3, /**< Reset port rst_lc_ni */
102 kDtPwrmgrResetEsc = 4, /**< Reset port rst_esc_ni */
103 kDtPwrmgrResetCount = 5, /**< \internal Number of reset ports */
105
106/**
107 * List of supported hardware features.
108 */
109#define OPENTITAN_PWRMGR_HAS_STARTUP_LIFE_CYCLE_INITIALIZATION 1
110#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_IO_IN_LOW_POWER 1
111#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_MAIN_IN_LOW_POWER 1
112#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_USB_IN_LOW_POWER 1
113#define OPENTITAN_PWRMGR_HAS_CLOCK_CONTROL_USB_WHEN_ACTIVE 1
114#define OPENTITAN_PWRMGR_HAS_LOW_POWER_ENTRY 1
115#define OPENTITAN_PWRMGR_HAS_LOW_POWER_DISABLE_POWER 1
116#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_PIN_WKUP_REQ_WAKEUP_ENABLE 1
117#define OPENTITAN_PWRMGR_HAS_LOW_POWER_PINMUX_AON_PIN_WKUP_REQ_WAKEUP_REQUEST 1
118#define OPENTITAN_PWRMGR_HAS_LOW_POWER_AON_TIMER_AON_WKUP_REQ_WAKEUP_ENABLE 1
119#define OPENTITAN_PWRMGR_HAS_LOW_POWER_AON_TIMER_AON_WKUP_REQ_WAKEUP_REQUEST 1
120#define OPENTITAN_PWRMGR_HAS_LOW_POWER_SOC_PROXY_WKUP_EXTERNAL_REQ_WAKEUP_ENABLE 1
121#define OPENTITAN_PWRMGR_HAS_LOW_POWER_SOC_PROXY_WKUP_EXTERNAL_REQ_WAKEUP_REQUEST 1
122#define OPENTITAN_PWRMGR_HAS_LOW_POWER_WAKE_INFO 1
123#define OPENTITAN_PWRMGR_HAS_RESET_CHECK_ROM_INTEGRITY 1
124#define OPENTITAN_PWRMGR_HAS_RESET_AON_TIMER_AON_AON_TIMER_RST_REQ_ENABLE 1
125#define OPENTITAN_PWRMGR_HAS_RESET_AON_TIMER_AON_AON_TIMER_RST_REQ_REQUEST 1
126#define OPENTITAN_PWRMGR_HAS_RESET_SOC_PROXY_RST_REQ_EXTERNAL_ENABLE 1
127#define OPENTITAN_PWRMGR_HAS_RESET_SOC_PROXY_RST_REQ_EXTERNAL_REQUEST 1
128#define OPENTITAN_PWRMGR_HAS_RESET_ESCALATION_REQUEST 1
129#define OPENTITAN_PWRMGR_HAS_RESET_ESCALATION_TIMEOUT 1
130#define OPENTITAN_PWRMGR_HAS_RESET_SW_RST_REQUEST 1
131#define OPENTITAN_PWRMGR_HAS_RESET_MAIN_POWER_GLITCH_RESET 1
132#define OPENTITAN_PWRMGR_HAS_RESET_NDM_RESET_REQUEST 1
133#define OPENTITAN_PWRMGR_HAS_RESET_POR_REQUEST 1
134
135
136
137/**
138 * Get the pwrmgr instance from an instance ID
139 *
140 * For example, `dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3`.
141 *
142 * @param inst_id Instance ID.
143 * @return A pwrmgr instance.
144 *
145 * **Note:** This function only makes sense if the instance ID has device type pwrmgr,
146 * otherwise the returned value is unspecified.
147 */
149
150/**
151 * Get the instance ID of an instance.
152 *
153 * @param dt Instance of pwrmgr.
154 * @return The instance ID of that instance.
155 */
157
158/**
159 * Get the register base address of an instance.
160 *
161 * @param dt Instance of pwrmgr.
162 * @param reg_block The register block requested.
163 * @return The register base address of the requested block.
164 */
165uint32_t dt_pwrmgr_reg_block(
166 dt_pwrmgr_t dt,
167 dt_pwrmgr_reg_block_t reg_block);
168
169/**
170 * Get the primary register base address of an instance.
171 *
172 * This is just a convenience function, equivalent to
173 * `dt_pwrmgr_reg_block(dt, kDtPwrmgrRegBlockCore)`
174 *
175 * @param dt Instance of pwrmgr.
176 * @return The register base address of the primary register block.
177 */
178static inline uint32_t dt_pwrmgr_primary_reg_block(
179 dt_pwrmgr_t dt) {
180 return dt_pwrmgr_reg_block(dt, kDtPwrmgrRegBlockCore);
181}
182
183/**
184 * Get the base address of a memory.
185 *
186 * @param dt Instance of pwrmgr.
187 * @param mem The memory requested.
188 * @return The base address of the requested memory.
189 */
190uint32_t dt_pwrmgr_memory_base(
191 dt_pwrmgr_t dt,
193
194/**
195 * Get the size of a memory.
196 *
197 * @param dt Instance of pwrmgr.
198 * @param mem The memory requested.
199 * @return The size of the requested memory.
200 */
201uint32_t dt_pwrmgr_memory_size(
202 dt_pwrmgr_t dt,
204
205/**
206 * Get the PLIC ID of a pwrmgr IRQ for a given instance.
207 *
208 * If the instance is not connected to the PLIC, this function
209 * will return `kDtPlicIrqIdNone`.
210 *
211 * @param dt Instance of pwrmgr.
212 * @param irq A pwrmgr IRQ.
213 * @return The PLIC ID of the IRQ of this instance.
214 */
216 dt_pwrmgr_t dt,
217 dt_pwrmgr_irq_t irq);
218
219/**
220 * Convert a global IRQ ID to a local pwrmgr IRQ type.
221 *
222 * @param dt Instance of pwrmgr.
223 * @param irq A PLIC ID that belongs to this instance.
224 * @return The pwrmgr IRQ, or `kDtPwrmgrIrqCount`.
225 *
226 * **Note:** This function assumes that the PLIC ID belongs to the instance
227 * of pwrmgr passed in parameter. In other words, it must be the case that
228 * `dt_pwrmgr_instance_id(dt) == dt_plic_id_to_instance_id(irq)`. Otherwise, this function
229 * will return `kDtPwrmgrIrqCount`.
230 */
232 dt_pwrmgr_t dt,
233 dt_plic_irq_id_t irq);
234
235
236/**
237 * Get the alert ID of a pwrmgr alert for a given instance.
238 *
239 * **Note:** This function only makes sense if the instance is connected to the Alert Handler. For any
240 * instances where the instance is not connected, the return value is unspecified.
241 *
242 * @param dt Instance of pwrmgr.
243 * @param alert A pwrmgr alert.
244 * @return The Alert Handler alert ID of the alert of this instance.
245 */
247 dt_pwrmgr_t dt,
248 dt_pwrmgr_alert_t alert);
249
250/**
251 * Convert a global alert ID to a local pwrmgr alert type.
252 *
253 * @param dt Instance of pwrmgr.
254 * @param alert A global alert ID that belongs to this instance.
255 * @return The pwrmgr alert, or `kDtPwrmgrAlertCount`.
256 *
257 * **Note:** This function assumes that the global alert ID belongs to the
258 * instance of pwrmgr passed in parameter. In other words, it must be the case
259 * that `dt_pwrmgr_instance_id(dt) == dt_alert_id_to_instance_id(alert)`. Otherwise,
260 * this function will return `kDtPwrmgrAlertCount`.
261 */
263 dt_pwrmgr_t dt,
264 dt_alert_id_t alert);
265
266
267
268/**
269 * Get the clock signal connected to a clock port of an instance.
270 *
271 * @param dt Instance of pwrmgr.
272 * @param clk Clock port.
273 * @return Clock signal.
274 */
276 dt_pwrmgr_t dt,
278
279/**
280 * Get the reset signal connected to a reset port of an instance.
281 *
282 * @param dt Instance of pwrmgr.
283 * @param rst Reset port.
284 * @return Reset signal.
285 */
287 dt_pwrmgr_t dt,
289
290
291
292/**
293 * Description of a wakeup source.
294 *
295 * A wakeup source is always identified by the instance ID of the module where it comes from.
296 * Some instances can have several wakeup signals, e.g. the pinmux has two (`pin` and `usb`).
297 * For such IPs, it is not sufficient to know the instance, we also need to know which
298 * signal triggered the wakeup. The `wakeup` index can be used to distinguish between those.
299 * This value should be casted to the `dt_<ip>_wakeup_t` type of the corresponding IP.
300 * For example, if the `pwrmgr` has two `pinmux` wakeup sources as described above, it's
301 * two wakeup sources will be described as follows:
302 * ```c
303 * {.inst_id = kDtInstanceIdPinmux, .wakeup = kDtPinmuxWakeupPinWkupReq}, // for `pin`
304 * {.inst_id = kDtInstanceIdPinmux, .wakeup = kDtPinmuxWakeupUsbWkupReq}, // for `usb`
305 * ```
306 */
307typedef struct dt_pwrmgr_wakeup_src {
308 dt_instance_id_t inst_id; /**< Instance ID of the source of this wakeup. */
309 size_t wakeup; /**< Index of the wakeup signal for that instance. */
311
312
313/**
314 * Get the number of wakeup sources.
315 *
316 * @param dt Instance of pwrmgr.
317 * @return Number of wakeup sources.
318 */
320
321/**
322 * Get the description of a wakeup source.
323 *
324 * The wakeup sources are ordered as they appear in the registers.
325 *
326 * @param dt Instance of pwrmgr.
327 * @param idx Index of the wakeup source, between 0 and `dt_pwrmgr_wakeup_src_count(dt)-1`.
328 * @return Description of the source.
329 */
331
332/**
333 * Description of a reset request source.
334 *
335 * A reset request source is always identified by the instance ID of the module where it comes
336 * from. In principle, some instances could have several reset requests. If this is the case,
337 * the `rst_req` can be used to distinguish between those. It should be cast to the
338 * `dt_<ip>_reset_req_t` type of the corresponding IP.
339 */
340typedef struct dt_pwrmgr_reset_req_src {
341 dt_instance_id_t inst_id; /**< Instance ID of the source of this reset request. */
342 size_t reset_req; /**< Index of the reset request signal for that instance. */
344
345
346/**
347 * Get the number of peripheral reset requests.
348 *
349 * @param dt Instance of pwrmgr.
350 * @return Number of reset requests.
351 */
353
354/**
355 * Get the description of a reset request.
356 *
357 * The reset requests are ordered as they appear in the registers.
358 *
359 * @param dt Instance of pwrmgr.
360 * @param idx Index of the reset request source, between 0 and
361 * `dt_pwrmgr_reset_request_src_count(dt)-1`.
362 * @return Description of the reset.
363 */
365
366
367
368#ifdef __cplusplus
369} // extern "C"
370#endif // __cplusplus
371
372#endif // OPENTITAN_DT_PWRMGR_H_